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Freescale Semiconductor /MKL28T7_CORE1 /RTC /IER

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Interpret as IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TIIE 0 (0)TOIE 0 (0)TAIE 0 (0)TSIE 0 (0)WPON 0 (000)TSIC

TOIE=0, TIIE=0, WPON=0, TSIE=0, TAIE=0, TSIC=000

Description

RTC Interrupt Enable Register

Fields

TIIE

Time Invalid Interrupt Enable

0 (0): Time invalid flag does not generate an interrupt.

1 (1): Time invalid flag does generate an interrupt.
TOIE

Time Overflow Interrupt Enable

0 (0): Time overflow flag does not generate an interrupt.

1 (1): Time overflow flag does generate an interrupt.
TAIE

Time Alarm Interrupt Enable

0 (0): Time alarm flag does not generate an interrupt.

1 (1): Time alarm flag does generate an interrupt.
TSIE

Time Seconds Interrupt Enable

0 (0): Seconds interrupt is disabled.

1 (1): Seconds interrupt is enabled.
WPON

Wakeup Pin On

0 (0): No effect.

1 (1): If the wakeup pin is enabled, then the wakeup pin will assert.
TSIC

Timer Seconds Interrupt Configuration

0 (000): 1 Hz.

1 (001): 2 Hz.

2 (010): 4 Hz.

3 (011): 8 Hz.

4 (100): 16 Hz.

5 (101): 32 Hz.

6 (110): 64 Hz.

7 (111): 128 Hz.

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data